Detailed reference for the IORWF instruction in PIC18 ISA.
Perform an inclusive OR (logical OR) between the contents of WREG and a file register f.
d = 0 → result is stored in WREG.d = 1 → result is stored back into register f.a = 0 → Access‑bank addressing.a = 1 → Banked addressing.; d=0, a=0 → result in WREG, Access bank
IORWF 0x24, 0, 0 ; WREG = 0x20 OR 0x0F = 0x2F; d=0, a=0 → result in WREG, Access bank
IORWF 0x24, 0, 0 ; WREG = 0x20 OR 0x0F = 0x2F; d=0, a=1 → result in WREG, Banked address
IORWF 0x24, 0, 1 ; WREG = 0x20 OR 0x0F = 0x2F; d=0, a=1 → result in WREG, Banked address
IORWF 0x24, 0, 1 ; WREG = 0x20 OR 0x0F = 0x2F; d=1, a=0 → result stored in file register, Access bank
IORWF 0x24, 1, 0 ; 0x24 = 0x20 OR 0x0F = 0x2F; d=1, a=0 → result stored in file register, Access bank
IORWF 0x24, 1, 0 ; 0x24 = 0x20 OR 0x0F = 0x2F; d=1, a=1 → result stored in file register, Banked address
IORWF 0x24, 1, 1 ; 0x24 = 0x20 OR 0x0F = 0x2F; d=1, a=1 → result stored in file register, Banked address
IORWF 0x24, 1, 1 ; 0x24 = 0x20 OR 0x0F = 0x2F; Load literal into WREG then OR, result in WREG (Access bank)
MOVLW 0x0F
IORWF 0x24, 0, 0 ; WREG = 0x20 OR 0x0F = 0x2F; Load literal into WREG then OR, result in WREG (Access bank)
MOVLW 0x0F
IORWF 0x24, 0, 0 ; WREG = 0x20 OR 0x0F = 0x2F