Detailed reference for the RLNCF instruction in PIC18 ISA.
Rotate the content of a file register f left by one bit while leaving the Carry flag unchanged.
d = 0 → result is stored in WREG.d = 1 → result is stored back into register f.a = 0 → Access‑bank addressing.a = 1 → Banked addressing. The bit shifted out of bit 7 is discarded and a 0 is shifted into bit 0.; d=0, a=0 → result in WREG, Access bank
RLNCF 0x20, 0, 0 ; W = (0x20 << 1) & 0xFF; d=0, a=0 → result in WREG, Access bank
RLNCF 0x20, 0, 0 ; W = (0x20 << 1) & 0xFF; d=0, a=1 → result in WREG, Banked address
RLNCF 0x20, 0, 1 ; W = (0x20 << 1) & 0xFF; d=0, a=1 → result in WREG, Banked address
RLNCF 0x20, 0, 1 ; W = (0x20 << 1) & 0xFF; d=1, a=0 → result back to file register, Access bank
RLNCF 0x20, 1, 0 ; 0x20 = (0x20 << 1) & 0xFF; d=1, a=0 → result back to file register, Access bank
RLNCF 0x20, 1, 0 ; 0x20 = (0x20 << 1) & 0xFF; d=1, a=1 → result back to file register, Banked address
RLNCF 0x20, 1, 1 ; 0x20 = (0x20 << 1) & 0xFF; d=1, a=1 → result back to file register, Banked address
RLNCF 0x20, 1, 1 ; 0x20 = (0x20 << 1) & 0xFF; Load literal into WREG then rotate left, result in WREG (Access bank)
MOVLW 0x10
RLNCF 0x20, 0, 0 ; W = (0x20 << 1) & 0xFF; Load literal into WREG then rotate left, result in WREG (Access bank)
MOVLW 0x10
RLNCF 0x20, 0, 0 ; W = (0x20 << 1) & 0xFF