PIC18 cheatsheet
ADDWFADDWFCANDWFCLRFCOMFCPFSEQCPFSGTCPFSLTDECFDECFSZDCFSNZINCFINCFSZINFSNZIORWFMOVFMOVFFMOVWFMULWFNEGFRLCFRLNCFRRCFRRNCFSETFSUBFWBSUBWFSUBWFBSWAPFTSTFSZXORWF
BCFBSFBTFSCBTFSSBTG
BCBNBNCBNNBNOVBNZBOVBRABZCALLCLRWDTDAWGOTONOPPOPPUSHRCALLRESETRETFIERETLWRETURNSLEEP
ADDLWANDLWIORLWLFSRMOVLBMOVLWMULLWRETLWSUBLWXORLW
TBLRD*TBLRD*+TBLRD*-TBLRD+*TBLWT*TBLWT*+TBLWT*-TBLWT+*

RRNCF

Detailed reference for the RRNCF instruction in PIC18 ISA.

Description

Rotate the contents of file register f one bit position to the right without affecting the C (carry) flag.

  • The least‑significant bit is discarded.
  • Bit 7 is loaded with logic 0 (logical shift right).
  • The C flag is preserved (no change).
  • The result is written either back to f or to WREG depending on d.
  • d = 0 → result is stored in WREG.
  • d = 1 → result is stored back into register f.
  • a = 0 → Access bank addressing.
  • a = 1 → Banked addressing.

Examples

; d=0, a=0  → rotate right, result in WREG, Access bank
RRNCF 0x20, 0, 0   ; W = 0x20 >> 1 (carry unchanged)
; d=0, a=1  → rotate right, result in WREG, Banked address
RRNCF 0x20, 0, 1   ; W = 0x20 >> 1 (carry unchanged)
; d=1, a=0  → rotate right, result back to f, Access bank
RRNCF 0x20, 1, 0   ; 0x20 = 0x20 >> 1 (carry unchanged)
; d=1, a=1  → rotate right, result back to f, Banked address
RRNCF 0x20, 1, 1   ; 0x20 = 0x20 >> 1 (carry unchanged)
; WREG preloaded with literal (unused), result in WREG
MOVLW 0xAB
RRNCF 0x20, 0, 0   ; W = 0x20 >> 1 (carry unchanged)