Detailed reference for the RLCF instruction in PIC18 ISA.
Rotate a file register f left through the Carry bit.
d = 0 → result is written to WREG.d = 1 → result is written back to register f.a = 0 → Access‑bank addressing.a = 1 → Banked addressing.; d=0, a=0 → result in WREG, Access bank; d=0, a=0 → result in WREG, Access bankRLCF 0x1F, 0, 0 ; W = (0x1F << 1) + C (C becomes original bit 7 of 0x1F)RLCF 0x1F, 0, 0 ; W = (0x1F << 1) + C (C becomes original bit 7 of 0x1F); d=0, a=1 → result in WREG, Banked address; d=0, a=1 → result in WREG, Banked addressRLCF 0x1F, 0, 1 ; W = (0x1F << 1) + C (banked 0x1F)RLCF 0x1F, 0, 1 ; W = (0x1F << 1) + C (banked 0x1F); d=1, a=0 → result back to file register, Access bank; d=1, a=0 → result back to file register, Access bankRLCF 0x1F, 1, 0 ; 0x1F = (0x1F << 1) + CRLCF 0x1F, 1, 0 ; 0x1F = (0x1F << 1) + C; d=1, a=1 → result back to file register, Banked address; d=1, a=1 → result back to file register, Banked addressRLCF 0x1F, 1, 1 ; 0x1F = (0x1F << 1) + C (banked)RLCF 0x1F, 1, 1 ; 0x1F = (0x1F << 1) + C (banked); Load literal into WREG then rotate file register, result in WREG (Access bank); Load literal into WREG then rotate file register, result in WREG (Access bank)MOVLW 0x3C
RLCF 0x1F, 0, 0 ; W = (0x1F << 1) + C with W pre‑loaded with 0x3CMOVLW 0x3C
RLCF 0x1F, 0, 0 ; W = (0x1F << 1) + C with W pre‑loaded with 0x3C